SN5412J

Technical Characteristics

• Input Circuit Pattern

  triple 3 input

• Operating Temp Range

  -55.0/+125.0 deg celsius

• Body Width

  0.220 inches minimum and 0.280 inches maximum

• Design Function And Quantity

  3 gate, nand

• Body Height

  0.140 inches minimum and 0.180 inches maximum

• Storage Temp Range

  -65.0/+150.0 deg celsius

• Output Logic Form

  transistor-transistor logic

• Maximum Power Dissipation Rating

  120.0 milliwatts

• Case Outline Source And Designator

  t0-116 joint electron device engineering council

• Inclosure Configuration

  dual-in-line

• Body Length

  0.660 inches minimum and 0.785 inches maximum

• Inclosure Material

  ceramic and glass

• Features Provided

  monolithic and positive outputs and hermetically sealed and w/open collector

• Time Rating Per Chacteristic

  45.00 nanoseconds maximum propagation delay time, low to high level output and 15.00 nanoseconds maximum propagation delay time, high to low level output