PL994551

Technical Characteristics

• Time Rating Per Chacteristic

  35.00 nanoseconds nominal propagation delay time, low to high level output

• Body Height

  0.030 inches minimum and 0.070 inches maximum

• Inclosure Material

  ceramic and glass

• Input Circuit Pattern

  7 input

• Features Provided

  monolithic and hermetically sealed and w/enable and asynchronous and w/clear and positive outputs

• Case Outline Source And Designator

  t0-86 joint electron device engineering council

• Terminal Surface Treatment

  gold

• Operating Temp Range

  -55.0/+125.0 deg celsius

• Voltage Rating And Type Per Characteristic

  -1.5 volts minimum power source and 5.5 volts maximum power source

• Inclosure Configuration

  flat pack

• Test Data Document

  06424-2603797 drawing (this is the basic governing drawing, such as a contractor drawing, original equipment manufacturer drawing, etc.; excludes any specification, standard or other document that may be referenced in a basic governing drawing)

• Body Width

  0.240 inches minimum and 0.260 inches maximum

• Output Logic Form

  diode-transistor logic

• Design Function And Quantity

  1 flip-flop, r-s, clocked and 1 flip-flop, r-s, master slave

• Maximum Power Dissipation Rating

  85.0 milliwatts

• Terminal Type And Quantity

  14 flat leads

• Storage Temp Range

  -65.0/+150.0 deg celsius

• Body Length

  0.240 inches minimum and 0.275 inches maximum