NSN: 5962-00-402-9324

Technical Characteristics

• Inclosure Material

  ceramic and glass

• Design Function And Quantity

  2 flip-flop, j-k, master slave

• Output Logic Form

  transistor-transistor logic

• Case Outline Source And Designator

  t0-88 joint electron device engineering council

• Body Height

  0.030 inches minimum and 0.070 inches maximum

• Terminal Surface Treatment

  solder

• Storage Temp Range

  -65.0/+150.0 deg celsius

• Body Length

  0.330 inches minimum and 0.350 inches maximum

• Terminal Type And Quantity

  14 flat leads

• Test Data Document

  12436-v00251 drawing (this is the basic governing drawing, such as a contractor drawing, original equipment manufacturer drawing, etc.; excludes any specification, standard or other document that may be referenced in a basic governing drawing)

• Features Provided

  positive outputs and w/clear and w/enable and hermetically sealed and monolithic and w/disable

• Maximum Power Dissipation Rating

  100.0 milliwatts

• Body Width

  0.240 inches minimum and 0.260 inches maximum

• Inclosure Configuration

  flat pack

• Voltage Rating And Type Per Characteristic

  -1.5 volts minimum power source and 5.5 volts maximum power source

• Operating Temp Range

  -55.0/+125.0 deg celsius

• Time Rating Per Chacteristic

  40.00 nanoseconds maximum propagation delay time, low to high level output and 25.00 nanoseconds maximum propagation delay time, high to low level output

• Input Circuit Pattern

  dual 4 input