NSN: 5962-00-626-1805

Technical Characteristics

• Test Data Document

  99380-0073-2097 drawing (this is the basic governing drawing, such as a contractor drawing, original equipment manufacturer drawing, etc.; excludes any specification, standard or other document that may be referenced in a basic governing drawing)

• Input Circuit Pattern

  dual 4 input

• Operating Temp Range

  -55.0/+125.0 deg celsius

• Features Provided

  monolithic and hermetically sealed and w/enable and positive outputs

• Body Width

  0.220 inches minimum and 0.280 inches maximum

• Body Height

  0.140 inches minimum and 0.180 inches maximum

• Storage Temp Range

  -65.0/+150.0 deg celsius

• Design Function And Quantity

  2 flip-flop, j-k, clocked and 2 flip-flop, j-k, master slave

• Inclosure Material

  ceramic and glass

• Body Length

  0.660 inches minimum and 0.785 inches maximum

• Inclosure Configuration

  dual-in-line

• Maximum Power Dissipation Rating

  200.0 milliwatts

• Case Outline Source And Designator

  t0-116 joint electron device engineering council

• Output Logic Form

  transistor-transistor logic

• Time Rating Per Chacteristic

  25.00 nanoseconds maximum propagation delay time, low to high level output and 40.00 nanoseconds maximum propagation delay time, high to low level output